الملخص الإنجليزي
Recent developments in communication link speeds, to meet the traffic requirements of the continuing evolution applications and network services being used, places increasing demands on the performance of routers. The Internet Protocol (IP) routers primary function is to determine the longest matching prefix, at the routing database lookup table for the next-hop, compared to the incoming packet's P destination address. The packet is then forwarded to the output link associated with that prefix, directed to the next router or the destination host. Therefore, with the increased traffic, higher speed links, increasing routing table sizes, migration from 32 bits IPv4 to 128 bits IPv6 addresses, and more demand for faster and efficient IP address lookups, a significant performance bottlenecks has been placed on the routers. Consequently, an industry's efficient, scalable, flexible and cost-effective solution for these challenges is a specialized processor called Network processor, which provides performance at hardware speeds while attaining the flexibility of software. In this work, it has been demonstrated that by adequately combining hardware and software features of the networking algorithms, a high performance can be achieved by the router. A proposed IP forwarding algorithm codes, for calculating the longest matching prefix, requires 902 computing cycles in sequential execution and 271 cycles only using parallel multithreading execution. Also, a proposed hardware of a router, based on the IXP1200 Network Processor along with two 1Gbps Interface Cards, 8Mbytes SRAM and 256Mbytes SDRAM, can handle 0.25Mpps of a 1024Bytes packet size at 2Gbps data rate line speed. A modified router hardware consisting of five DXP1200 Network Processor, five DRAM banks of 256Mbytes each (total of 1.28Gbytes), five SRAM banks of 8Mbytes each (total of 40Mbytes), and ten Interface Cards of 1Gbps each, scales to achieve 1.25Mpps with 10Gbps OC192 data rate.
